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rda microelectronics, inc. RDA5888- fully integrated soc for atv _ the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 0 RDA5888 fully integrated, low power analog tv on a chip d d a a t t a a s s h h e e e e t t www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 1 update history rev date author history description 1.0 2009-05-03 luoyang the primary datasheet 1.1 2009-05-04 luoyang 1.2 2009-07-23 hanlingcai 1.3 2009-09-23 hanlingcai www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv _ the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 2 features l single-chip tuner with ntsc/pal/secam decoder l worldwide fm radio reception l 110ma power consumption with digital output buffer l minimal external passive components l simple lna matching components l 50m- 870 mhz rf reception l 100db dynamic range l <6 db noise figure l fully integrated digital agc loop l fully integrated channel selectivity l fully integrated pll ( including loop filter) l > 35 dbc first-adjacent rejection l internal blank-level clamping l dynamic ghosting/fading compensation l support 26/27 mhz crystal l all-digital video timing generation l itu-601 compliant l analog and i2s digital audio output l i2c control port l on chip regulator voltage input 3v to 4.5v. l 64-pin 8x8 qfn package applications l portable applications such as laptops, portable dvd players l handheld applications such as cellular phones and pdas general description the RDA5888 is a fully integrated direct conversion soc for ntsc/pal/secam analog tv standards. the receiving frequency range is from 50mhz to 870mhz.the RDA5888 is a true single-chip design, requiring no external saw or ceramic filters, even high q off-chip inductors to achieve full channel selectivity with an average current consumption of 100ma. the RDA5888 utilizes a direct-conversion, zero-if architecture that allows for extremely good image and adjacent channel signal rejection. the RDA5888 consists of a variable gain lna, quadrature downconverter, variable low-pass filters, reference oscillator, vcos, synthesizer, high performance adc, dsp for decoder. the dsp provides final adjacent-channel rejection and audio/video carrier demodulation. the audio stream is fm-demodulated and passed to the audio output port, whereas the cvbs video stream is separated into component dideo and output onto the video data bus. based on rda s some innovative technique, the RDA5888 offers excellent phase noise and very low implementation loss, required for ntsc/pal/secam decoder. this tuner rf ic does not require a balun and its fully integrated design saves valuable board space and simplifies rf layout. www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv _ the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 3 block diagram 90 0 i 2 c interface programming and control rf input variable gain lna vco pll dividers, phase detector, loop filter and charge pump reference oscillator variable low pass filter adc dsp for ntsc/pal/ secam decoder adc data<7:0> clk hsync vsync figure 1. RDA5888 block diagram www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 4 dsp functional description figure 2. RDA5888 dsp block diagram radio baseband the radio basebasnd receive i/q signal from adc,it includes sinc downsample,agc(auto rf gain and digital gain control) ,rssi(receive signal strength indicator) and channel filtering. fm demodulator the fm demodulator includes channel selection, fm demodulation,adaptive noise cancellation, programmable de-emphasis(50/75 m s),bass boost, volume control. digital audio stream is converted into analog througn dac. vsb demodulator the vsb demodulator is an am vestigial sideband demodulator for cvbs signal recovery. pal/ntsc/secam decoder the pal/ntsc/secam decoder can handle ntsc,pal,secam, m,d,b,i,g,h,l,k in cvbs format according to register-selected. it can be divided into a luminance path and a chrominance path. the luminance path first clamp the video signal, then calibration to target level and through a luma filter. the chrominance path has a color subcarrier recovery unit to regenerate the color subcarrier for any modulated chroma scheme and then performs an am demodulation for pal and ntsc and an fm demodulation for secam according to register-selected. ycbcr to itu-601 interface is converted from yuv/yiq/yrb . . itu-601 interface the itu-601 interface is an itu-601 compliant 8bit 4:2:2(ycbcr) parallel interface which include dclk,hsync,vsync,data[7:0].dclk,hsync,vsync all have polarity option. below is the timing for the bus: www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 5 figure 3. 525 line itu-601 timing diagram figure 4. 625 line itu-601 timing diagram www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv _ the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 5 electrical specifications table 1 recommended operating conditions parameter symbol min typ max unit analog supply voltage vbat 3 3.3 +4.5 v ambient temperature t a -25 27 +85 c table 2 dc electrical specification parameter symbol min typ max unit cmos low level input voltage v il 0 0.3*vdd v cmos high level input voltage v ih 0.7*vdd vdd v cmos threshold voltage v th 0.5*vdd v table 3 power consumption specification (vbat = 3 to 4.5 v, t a = -25 to 85 c, unless otherwise specified) symbol description condition typ unit icc receiver on 110 ma i cc(sleep) sleep mode (pdn = 0) 40 m a table 4 system characteristics (vbat = 3 to 4.5 v, t a = -25 to 85 c, unless otherwise specified) parameter symbol conditions min typ max unit rf input frequency f in 50 870 mhz maximum rf input rfih -10 dbm noise figure nf max gain 5 8 db input refered third-order intercept iip3 max gain -14 -12 dbm input refered econd-order intercept iip2 max gain 35 dbm iq amplitude balance iqab 0.1 db iq phase balance iqpb 0.2 deg matched input resistance r in 50 power up setting time pust 200 ms www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 6 table 5 frequency synthesizer characteristics (vbat = 3 to 4.5 v, t a = -25 to 85 c, unless otherwise specified) symbol description conditions min typ max unit t sw rx switch on time 200 us f rflo synthesizer frequency 50 870 mhz pn1 f=1khz -120 -100 -85 dbc/hz pn2 f=10khz -125 -105 -95 dbc/hz pn3 f=100khz -130 -110 -100 dbc/hz pn4 phase noise f=1mhz -150 -130 -120 dbc/hz www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 7 control interface RDA5888 enable software programming through i2c interface. software controls chip working states, and allows user read status registers to get operation result through i2c interface. the i2c interface of RDA5888 is compliant to i2c-bus specification 2.1(fast-mode, bit rate up to 400kbit/s). it includes two pins: sclk and sda. sclk is an input pin; sda is a bi-direction pin. the i2c interface transfer begins with start condition, a command byte and data bytes, each byte has a followed ack (or nack) bit, and ends with stop condition. the command byte includes a 7-bit device address {chip_id[6:0](default is 7'b1100_010)} and a r/w bit. the ack (or nack) is always sent out by the receiver. when in write transfer process, data bytes are written out from mcu, and when in read transfer process, data bytes are read out from RDA5888. the RDA5888 contains status/control registers. these read/write registers are addressed as sub-address on the i2c bus. RDA5888 i2c interface supports both single and sequential register access. software could follow the following ways to perform register read/write access: random access single write start device address w a register address a register data[15:8] a register data[7:0] a stop random access single read start device address w a register address a start device address r a registe data[15:8] a registe data[7:0] n stop : write bit (0: write; 1: read) a: acknowledge bit (ack) n: not acknowledge bit (no ack) for random access single write transfer, mcu sends out the start signal, rda5880 s device address and 1 bit write signal in sequence to the i2c bus. after receiving RDA5888 s ack signal, mcu sends out the target register s address (8 bits) to RDA5888 and then programs this register with proper data (8 bits ). a stop signal is sent out by mcu to end this transfer when programming is finished. for random access single read transfer, mcu first sends out the start signal, the RDA5888 s device address and 1 bit write signal to the i2c bus. after receiving RDA5888 s ack signal, mcu sends the target register s address to the interface. then mcu should send another command byte, including a restart signal, the RDA5888 s device address and 1 bit read signal. then RDA5888 will send the register s data to mcu through i2c bus. after the byte has been received, mcu should send a no ack response signal and a stop signal to finish this read transfer. www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 8 table 6 i 2 c bus characteristics (vdd = 2.7 to 3.6 v, t a = -25 to 85 c, unless otherwise specified) parameter symbol test condition min typ max unit sclk frequency f scl 0 - 200 khz sclk high time t high 0.6 - - m s sclk low time t low 1.3 - - m s setup time for start condition t su:sta 0.6 - - m s hold time for start condition t hd:sta 0.6 - - m s setup time for stop condition t su:sto 0.6 - - m s sdio input to sclk setup t su:dat 100 - - ns sdio input to sclk hold t hd:dat 0 - 900 ns stop to start time t buf 1.3 - - m s sdio output fall time t f:out 20+0.1c b - 250 ns sdio input, sclk rise/fall time t r:in / t f:in 20+0.1c b - 300 ns input spike suppression t sp - - 50 ns sclk, sdio capacitive loading c b - - 50 pf digital input pin capacitance 5 pf figure 5. i 2 c interface write timing diagram figure 6. i 2 c interface read timing diagram www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 9 pin description pin number name i/o description 1 nc 2 pdn i total power down 3 vhfl-in i vhfl rf input 4 vhfl_cap i no connect www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 10 5 vhfh_in i vhfh rf input 6 vhfh_cap i no connect 7 uhf_cap i no connect 8 uhf_in i uhf rf input 9 vbat i battery avdd 10 vbat i battery avdd 11 tp o test pin 12 lo_test o test pin 13 vbat i battery avdd 14 nc 15 nc 16 nc 17 vbat i battery avdd 18 xref i/o connect to crystal ( if using external crystal oscillator, this pin connect to the oscillator s output ) 19 xtal o connect to crystal 20 xout o test pin 21 vbat i battery avdd 22 sclk i/o serial clock input 23 sdio i/o serial data input 24 gpio3 i/o gpio 25 gpio2 i/o gpio 26 gpio1 i/o gpio 27 gpio0 i/o gpio 28 fid i 29 hsync o hsync line 30 vsync o vsync line 31 vio o vio 32 data15 o data output 33 data14 o data output 34 data13 o data output 35 data12 o data output 36 data11 o data output 37 data10 o data output 38 data9 o data output 39 data8 o data output 40 dclk o data clk output 41 data7 o data output 42 data6 o data output 43 data5 o data output 44 data4 o data output www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 11 45 data3 o data output 46 data2 o data output 47 data1 o data output 48 data0 o data output 49 vio o vio 50 vbat i battery avdd 51 dcdc_sw o dcdc output 52 vbat i battery avdd 53 dvdd_ldo o ldo output 54 dvdd_dsp i dvdd dsp 55 sdata i/o i2s data 56 lrck left/right audio sample indicator 57 sck audio slave clock 58 mck audio master clock 59 outn_q o negative baseband q channel out 60 outp_q o positive baseband q channel out 61 outn_i o positive baseband i channel out 62 outp_i o negative baseband i channel out 63 lout audio analog dac output 64 vbat i battery avdd www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 12 package outline 64-pin 8x8 quad flat no-lead (qfn) www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 13 solder mounting condition classification reflow profile table-i classification reflow profiles profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (t smax to t p ) 3 o c/second max. 3 o c/second max. preheat -temperature min (t smin ) -temperature max (t smax ) -time (t smin to t smax ) 100 o c 100 o c 60-120 seconds 150 o c 200 o c 60-180 seconds time maintained above: -temperature (t l ) -time (t l ) 183 o c 60-150seconds 217 o c 60-150 seconds peak /classification temperature(t p ) see table-ii see table-iii time within 5 o c of actual peak temperature (t p ) 10-30 seconds 20-40 seconds www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 14 ramp-down rate 6 o c/second max. 6 o c/seconds max. time 25 o c to peak temperature 6 minutes max. 8 minutes max. table C ii snpb eutectic process C package peak reflow temperatures package thickness volume mm 3 <350 volume mm 3 350 2.5mm 240 + 0/-5 o c 225 + 0/-5 o c 2.5mm 225 + 0/-5 o c 225 + 0/-5 o c table C iii pb-free process C package classification reflow temperatures package thickness volume mm 3 350 volume mm 3 350-2000 volume mm 3 2000 1.6mm 260 + 0 o c * 260 + 0 o c * 260 + 0 o c * 1.6mm C 2.5mm 260 + 0 o c * 250 + 0 o c * 245 + 0 o c * 2.5mm 250 + 0 o c * 245 + 0 o c * 245 + 0 o c * * tolerance : the device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature(this mean peak reflow temperature + 0 o c. for example 260+ 0 o c ) at the rated msl level. note 1: all temperature refer topside of the package. measured on the package body surface. note 2: the profiling tolerance is + 0 o c, - x o c (based on machine variation capability)whatever is required to control the profile process but at no time will it exceed - 5 o c. the producer assures process compatibility at the peak reflow profile temperatures defined in table C iii. note 3: package volume excludes external terminals(balls, bumps, lands, leads) and/or non integral heat sinks. note 4: the maximum component temperature reached during reflow depends on package the thickness and volume. the use of convection reflow processes reduces the thermal gradients between packages. however, thermal gradients due to differences in thermal mass of smd package may sill exist. note 5: components intended for use in a lead-free assembly process shall be evaluated using the lead free classification temperatures and profiles defined in table-i ii iii whether or not lead free. www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 15 rohs compliant the product does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (pbb) or polybrominated diphenyl ethers (pbde), and are therefore considered rohs compliant. esd sensitivity integrated circuits are esd sensitive and can be damaged by static electricity. proper esd techniques should be used when handling these devices. www.datasheet.co.kr datasheet pdf - http://www..net/
rda microelectronics, inc. RDA5888- fully integrated soc for atv the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda. 16 disclaimer the information provided here is believed to be reliable; rda microelectronics assumes no reliability for inaccuracies and omissions. rda microelectronics assumes no reliability for the use of this information and all such information should entirely be at the user s own risk. specifications described and contained here are subjected to change without notice on the purpose of improving the design and performance. all of this information described herein should not be implied or granted for any third party. rda microelectronics does not authorize or warrant any rda products for use in the life support devices or systems. copyright@2005 rda microelectronics inc. all rights reserved for technical questions and additional information about rda microelectronics inc.: website: www.rdamicro.com mailbox: info@rdamicro.com rda microelectronics (shanghai), inc. rda microelectronics (beijing), inc. tel: +86-21-50271108 tel: +86-10-63635360 fax: +86-21-50271099 fax: +86-10-82612663 www.datasheet.co.kr datasheet pdf - http://www..net/

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